US Patent 7439129 Methods for fabricating ferroelectric memory devices

A ferroelectric memory device includes a semiconductor substrate, ferroelectric capacitors, conductive patterns, and plate lines. The ferroelectric capacitors are arranged in rows and columns on the semiconductor substrate. The conductive patterns are arranged in even numbered and odd numbered rows. Each of the conductive patterns is on, and electrically connected to, a plurality of adjacent ones of the ferroelectric capacitors. The plate lines are in rows that extend along even numbered and odd numbered columns. The plate lines in the even numbered columns are electrically connected to at least two of the conductive patterns in the even numbered rows and are electrically isolated from the conductive patterns in the odd numbered rows. The plate lines in the odd numbered columns are electrically connected to at least two of the conductive patterns in the odd numbered rows and are electrically isolated from the conductive patterns in the even numbered rows.