US Patent 7439604 Method of forming dual gate dielectric layer

A semiconductor device includes a dual gate dielectric layer that increases a performance of a semiconductor device. The semiconductor device includes a first dielectric layer having a predetermined thickness on a semiconductor substrate. The first dielectric layer is formed on a first region. The semiconductor device also includes a second dielectric layer having a dielectric constant higher than that of the first dielectric layer. The second dielectric layer is formed on both the first region and a second region.