US Patent 7443214 PLL circuit and frequency setting circuit using the same

Disclosed is a PLL circuit in which an AC signal with a predetermined frequency is supplied as an input signal to a phase shifter comprising an OTA and a capacitor, and a phase comparator that receives the input signal to the phase shifter and an output signal from the phase shifter outputs a signal corresponding to a phase difference between the input signals. Control is performed so that the phase difference given by the phase shifter becomes a constant value by changing a transconductance (gm) of at the OTA constituting the phase shifter, using an output voltage of an amplifier for amplifying a DC voltage of the output signal of the phase comparator as a control signal.