US Patent 7447948 ECC coding for high speed implementation

Patent 7447948 was granted and assigned to Intel on November, 2008 by the United States Patent and Trademark Office.

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Patent Citations Received

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US Patent 12026053 Methods and apparatus for reducing microbumps for inter-die double-data rate (DDR) transfer

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Patent Inventor Names

Duane E. Galbi0

Jose Niell0

Ranjit Loboprabhu0

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Patent abstract

Methods and apparatus for performing error correction code (ECC) coding techniques for high-speed implementations. The ECC code word is structured to facilitate a very fast single-error-detect (SED) that allows state machines to be stopped within a single cycle when an error is detected and enables a corresponding single-error-correct (SEC) operation to be performed over multiple cycles while the state machines are in a suspended mode.

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Official Website

https://pdfpiw.uspto.gov/.piw?Docid=074479480

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