US Patent 7450442 Semiconductor memory device with increased domain crossing margin

A semiconductor memory device with an increased domain crossing margin is provided. The semiconductor memory device includes: a data input buffer for receiving an external data in response to a driving signal; a DQS input buffer for receiving an external data strobe signal in response to the driving signal; a delay unit for delaying an output signal of the DQS input buffer by a predetermined time; a division unit for dividing an output signal of the DQS input buffer to output a plurality of internal data strobe signals; and a data align unit for aligning an output data of the delay unit in response to the corresponding internal data strobe signals to output a plurality of align data.