Patent 7453150 was granted and assigned to Rensselaer Polytechnic Institute on November, 2008 by the United States Patent and Trademark Office.
A via for connecting metallization layers of chips bonded in a face-to-face configuration is provided, as well as methods of fabricating the via. The via may function as an interconnection of metallization layers in three-dimensional, stacked, integrated circuits, and may enable high density, low-resistance interconnection formation.