Patent attributes
When a barrel shift device is divided into pipeline registers and a shift process is executed in a multistage process stage, by decoding a second control signal for controlling a shift amount of a second shift circuit 50 using a decoding circuit 20, it is detected at what digit positions in intermediate data in an intermediate data holding circuit 30 data elements which are to be finally output as output data from the second shift circuit 50 are located. Based on a result of the detection of digit positions by the decoding circuit 20, the intermediate data holding circuit 30 holds only data elements to be finally output, among data elements in the intermediate data, and does not hold unnecessary data elements which are not included in the output data. Therefore, by controlling a data storage operation in the intermediate data holding circuit 30, an increase in power due to the pipeline structure is suppressed.
