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US Patent 7463060 Programmable logic device and method of testing

Patent 7463060 was granted and assigned to Lattice Semiconductor on December, 2008 by the United States Patent and Trademark Office.

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Current Assignee
Lattice Semiconductor
Lattice Semiconductor
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7463060
Date of Patent
December 9, 2008
Patent Application Number
11452714
Date Filed
June 13, 2006
Patent Primary Examiner
‌
Daniel D Chang
Patent abstract

A programmable logic device may comprise a plurality of programmable resources and non-volatile configuration memory to store configuration data by which to configure the programmable resources. Test override circuitry may determine a test mode and selectively override the configuration data stored in the non-volatile configuration memory during the test mode for configuring the programmable resources based at least in part on test configuration data other than the configuration data stored in the non-volatile memory. A buffer may be operable to drive a configuration select node for at least one of the programmable resources for designating a configuration therefore based on the configuration data of the non-volatile memory. The test override circuitry may comprise a pull-down circuit operable, when enabled dependent on the test configuration data, to drive the buffer with a high/low level capable of overriding a state of the non-volatile configuration memory.

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