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Patent attributes
Current Assignee
0
Patent Jurisdiction
Patent Number
Date of Patent
December 9, 2008
0Patent Application Number
102920850
Date Filed
November 12, 2002
0Patent Primary Examiner
Patent abstract
In an analog front end (FE) IC chip having a CDS (Correlated Double Sampling) function and an AGC (Automatic Gain Control) function, a clamp circuit for clamping an output signal during a black reference signal period is equipped with a mechanism for suppressing the effect of noises contaminated from a power source, external circuits, etc.
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