Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Chih-Ta Chien0
Jiun-In Guo0
Chia-Jui Huang0
Date of Patent
December 9, 2008
0Patent Application Number
115174100
Date Filed
September 8, 2006
0Patent Primary Examiner
Patent abstract
A method for memory controlling is disclosed. It includes an embedded address generator and a controlling scheme of burst terminates burst, which could erase the latency caused by bus interface during the access of non-continuous addresses. Moreover, it includes a controlling scheme of anticipative row activating, which could reduce the latency across different rows of memory by data access. The method could improve the access efficiency and power consumption of memory.
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