US Patent 7467176 Saturation and rounding in multiply-accumulate blocks

Patent 7467176 was granted and assigned to Altera on December, 2008 by the United States Patent and Trademark Office.

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Patent

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Current Assignee

Altera

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

74671760

Date of Patent

December 16, 2008

Patent Application Number

107838290

Date Filed

February 20, 2004

Patent Primary Examiner

‌

Tan V. Mai

Patent abstract

Saturation and rounding capabilities are implemented in multiply-accumulate (MAC) blocks to provide rounded and saturated outputs of multipliers and of add-subtract-accumulate circuits implemented using DSP. These features support any suitable format of value representation, including the x.15 format. Circuitry within the multipliers and the add-subtract-accumulate circuits implement the rounding and saturation features of the present invention.

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