Patent attributes
A slew rate controlled circuit driver generates a binary output signal with strong direct current (DC) characteristics based on a received binary logic signal, while minimizing crowbar current. The slew rate controlled circuit driver may include a first driver with smaller transistors that open and/or close quickly to allow a generated output signal to meet required rise and fall time requirements, and may include a second driver with larger transistors that open and/or close more slowly, that allow the generated output signal to support for strong DC signal characteristics, such as support for high DC current loads without degrading the DC voltage signal levels. Further, OPEN and CLOSE states of transistors within each of the first and second drivers may be controlled to reduce, during switching between HIGH and LOW output signal states, the establishment of paths between HIGH signal sources and LOW signal sources that contribute to crowbar current.
