US Patent 7472154 Multiplication remainder calculator

In a circuit which adds a partial product {Σ(Aj*B)*2^j (j=0, . . . , m−1)} to a provisional remainder u by using a value of inferior m bits (m is an integer not less than 2) of a number to be multiplied A and a multiplier factor B, there is provided a multiplication remainder calculator which shifts inferior m bits of a provisional remainder u by continuously connecting m stages of processing circuits which perform addition of a modulus N and one-bit shift, and calculates a Montgomery product of the number to be multiplied A and the multiplier factor B by repeating this processing, wherein a multiple number of the multiplier factor can be calculated by inhibiting one-bit shift of the processing circuits.