US Patent 7474007 Semiconductor package

A semiconductor package of this invention achieves higher wiring densities and increases the degree of freedom of the wiring design. The semiconductor package includes a first substrate having first and second faces, and first wiring provided on the first face of the first substrate. The semiconductor package also includes a second substrate having first and second faces, and second wiring provided on the first face of the second substrate. The semiconductor package also includes a semiconductor chip connected to the first and second wiring. The first face of the first substrate faces the first face of the second substrate, and the first and second wiring intersect one another in three dimensions in an isolated state.