A DPSK demodulator demodulates DPSK signals in a computationally efficient manner to reduce the power requirements of the DPSK demodulator. A DPSK signal is received, digitized, converted to its in-phase (I) and quadrature (Q) components and filtered to remove noise. The I and Q components are processed to determine a relative phase and frequency offset. The phase is adjusted using the frequency offset. The adjusted phase is converted to an absolute phase, which is then mapped to a symbol representative of one or more bits of data.