US Patent 7479416 Thin film transistor array panel and manufacturing method thereof

A method of manufacturing a thin film transistor array panel is provided, which includes: forming a thin film transistor including a gate electrode, a drain electrode, a source electrode and a semiconductor on a substrate; forming a first passivation layer on the drain and the source electrodes; forming a transparent conductive layer on the first passivation layer; etching the transparent conductive layer using a photoresist as an etch mask to expose the portion of the first passivation layer and to form a pixel electrode connected the drain electrode; ashing the first passivation layer and the photoresist; and removing the photoresist.