US Patent 7479673 Semiconductor integrated circuits with stacked node contact structures
Patent 7479673 was granted and assigned to SAMSUNG ELECTRONICS CO., LTD. on January, 2009 by the United States Patent and Trademark Office.
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Semiconductor integrated circuits that include thin film transistors (TFTs) and methods of fabricating such semiconductor integrated circuits are provided. The semiconductor integrated circuits may include a bulk transistor formed at a semiconductor substrate and a first interlayer insulating layer on the bulk transistor. A lower TFT may be on the first interlayer insulating layer, and a second interlayer insulating layer may be on the lower TFT. An upper TFT may be on the second interlayer insulating layer, and a third interlayer insulating layer may be on the upper TFT. A first impurity region of the bulk transistor, a first impurity region of the lower TFT, and a first impurity region of the upper TFT may be electrically connected to one another through a node plug that penetrates the first, second and third interlayer insulating layers.
US Patent 07479673 Semiconductor integrated circuits with stacked node contact structures US Patent 7479673 Semiconductor integrated circuits with stacked node contact structures
US Patent 07479673 Semiconductor integrated circuits with stacked node contact structures
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