Patent attributes
A system and method for testing a Link Control Card (LCC) of a storage device includes a host, a middle plane (MP), a switch, and a testing device array. The host is connected to the testing device array for sending out command sets and receiving results. The MP is connected between the LCC and the testing device array. The switch determines the LCC to output hard reset signals and the hard reset signals are transferred to the testing device array via the MP. The testing device array includes a plurality of testing devices, and each of the testing devices includes a micro-controller unit (MCU); a connector being connected to the MCU, and coupled to the MP; an address setting unit being connected to the MCU, for setting an unique address of each of the testing devices; and a first interface being connected to the MCU for outputting results.
