Patent attributes
A nonvolatile semiconductor memory in which the area of each memory cell is small and which can perform high-speed operation with accuracy. A pair of honeycomb-like diffusion layers which are deviated from each other by a quarter-pitch are formed. Memory transistors (MemoryTr) and select transistors (SelectTr) are formed at portions where a pair of adjacent word lines pass over one diffusion layer and at portions where another pair of adjacent word lines pass over the other diffusion layer. In this case, the memory transistors and the select transistors are arranged so as to form a memory cell between a pair of bit lines connected to each diffusion layer. As a result, though the select transistors are located, many memory cells can be arranged like an array in a small layout area.
