US Patent 7487415 Memory circuitry with data validation

Memory circuitry is augmented with data validation circuitry that is closely coupled to the memory circuitry so that data read out of the memory for use in a validation operation does not have to pass through or to general-purpose routing or logic circuitry before it can be used by the data validation circuitry. The data validation circuitry compares the data read from the memory to other signals to determine whether or not there is a match. The data validation circuitry is preferably programmable to select which bits of a word read from the memory will actually be used in the data validation operation.