US Patent 7488645 Method of fabricating a non-volatile memory

A non-volatile memory and a method of fabricating the same are described. First, a substrate is provided. Then, a plurality of stack structures is formed on the substrate. Each stack structure comprises, from bottom to top, a bottom dielectric layer, a charge trapping layer, a top dielectric layer, a control gate and a cap layer. Next, a plurality of spacers is formed on the sidewalls of the stack structures. Thereafter, a gate dielectric layer is formed over the substrate. A word line is formed between two neighboring stack structures. After that, the cap layers in the stack structures are removed. A source and a drain are formed in the substrate beside the stack structures adjacent to the sides of each word line.