US Patent 7488926 Pixel array with shared pixel output lines

Multiple pixels within a pixel array share a common output line. Each output line from the array is connected to one or more storage elements. Each of the storage elements receives a counter signal corresponding to levels of a reference voltage within each of the pixels. When an output line signal reaches a predetermined value, a storage element receiving that predetermined value latches the current value of the counter signal. Outputs from pixels of multiple columns in the array may be time-multiplexed onto the output lines or may form a serial scan chain connected to a single output line.