Patent attributes
A non-volatile semiconductor memory device includes a memory cell array and a sense amplifier, the device being internally controlled to execute a write sequence with write pulse applications and write-verify operations repeated for writing a set of memory cells selected in the memory cell array, wherein the sense amplifier performs a write speed verify operation for detecting write speed of plural memory cells to be written into a certain data state after a certain write pulse application at the beginning of the write sequence, thereby getting discriminating data for classifying the plural memory cells into first and second cell groups, and after the write speed verify operation, the first and second cell groups are alternately written on different write conditions from each other with reference to the discriminating data.
