US Patent 7496139 Bit reduction apparatus
Patent 7496139 was granted and assigned to Panasonic on February, 2009 by the United States Patent and Trademark Office.
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Patent Inventor Names
Takahisa Hatano0
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Patent abstract
A bit reduction apparatus prevents visual recognition of beat noise while maintaining gradation. The bit reduction apparatus changes over the bit reduction operation by executing simple discarding process and noise shaping process, on the basis of at least any one of input signal state, user's setting state, and apparatus setting state.
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US Patent 07496139 Bit reduction apparatus US Patent 7496139 Bit reduction apparatus
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Patent Number
074961390
Patent Number
74961390
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Current Assignee
Patent Jurisdiction
Patent Number
074961390
Date of Patent
February 24, 2009
0Patent Application Number
105031030
Date Filed
August 8, 2003
0Official Website
Patent Primary Examiner
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US Patent 07496139 Bit reduction apparatus
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07496139
Date of patent
February 24, 2009
Patent application number
10503103
Date Filed
August 8, 2003
Patent primary examiner
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