US Patent 7498264 Method to obtain fully silicided poly gate

The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a spacer material 160 over gate electrodes 150 that are, in turn, located over a microelectronics substrate 110. The gate electrodes 150 have a doped region 170a located between them. A portion of the spacer material 160 is removed with a chemical/mechanical process using a slurry that is selective to a portion of the spacer material 160. The method further comprises etching a remaining portion of the spacer material 163, 165, 168 to form spacer sidewalls 163, 165, 168 on the gate electrodes 150. The etching exposes a surface of the gate electrodes 150 and leaves a portion of the spacer material 168 over the doped region 170a. Metal is then incorporated into the gate electrodes 150 to form silicided gate electrodes 150.