Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Hideki Arakawa0
Satoshi Torii0
Masaru Yano0
Hidehiko Shiraiwa0
Jaeyong Park0
Date of Patent
March 10, 2009
0Patent Application Number
115956390
Date Filed
November 10, 2006
0Patent Primary Examiner
Patent abstract
A SONOS memory cell, formed within a semiconductor substrate, includes a bottom dielectric disposed on the semiconductor substrate, a charge trapping material disposed on the bottom dielectric, and a top dielectric disposed on the charge trapping material. Furthermore, the SONOS memory cell includes a word-line gate structure disposed on the top dielectric and at least one bit-line gate for inducing at least one inversion bit-line within the semiconductor substrate.
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