A DAC cell comprising: two or more PMOS core devices coupled in series between a power supply and a steering node; a first core transistor coupled between the steering node and a complementary power supply line and controlled by a control signal; and a second core transistor coupled between the steering node and an output of the DAC cell and controlled by a logical inverse of the control signal, wherein the control signal and its logical inverse direct a current from the steering node to either the complementary power supply line or to the output of the DAC cell based on the control signal.