Patent attributes
The multi-mode phase and data detector includes a phase detector and a charge pump. A plurality of latching blocks clocked on complimentary phases of a feedback signal produces a plurality of phase and transition signals. Based on a selectable bias level, latched comparators in the latching blocks operate to detect the multi-level input data signal as it crosses a plurality of threshold levels. Logic within the multi-mode phase and data detector selects subsets of exclusive OR gates from sets of exclusive OR gates and subsets of the latching comparators to place the multi-mode phase and data detector in one of a PAM-4, NRZ, or PRML mode of operation. The logic further selects subsets of latched comparators from the plurality of parallel coupled latches to further define the mode of operation of the multi-mode phase and data detector.
