Is a
Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
March 24, 2009
Patent Application Number
11753460
Date Filed
May 24, 2007
Patent Citations Received
Patent Primary Examiner
Patent abstract
A memory module having a DRAM device configured to generate a low DQS state on a DQS line, and a buffer coupled to the DRAM device, the buffer having a plurality of drivers, wherein the buffer is configured to detect the low DQS state by comparing the low DQS state to a low voltage level of one of the plurality of drivers.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.
