Patent attributes
A synchronous serial data two-wire communications bus that can transfer data at rates up to 100 kbit/s (standard mode), 400 kbits/s (fast mode), or 3.4 Mbit/s (high-speed mode). The load of I2C bus can vary from 10 pf to 400 pf. Data transfer on the I2C bus takes place through IO's used to connect the devices on the I2C bus utilizing two different IO buffers for DATA and CLOCK lines that can be switched into any of the three different modes of operation without using any external current source or external control circuit. IO buffers are provided with two additional pins ENHS and HLOAD to switch the IO buffers in different modes of operation. Both DATA and CLOCK buffers have built-in current sources, and their control circuits control the rise and fall time of I2C bus in different modes of operation.
