US Patent 7515670 Early-late synchronizer having reduced timing jitter

A device for maintaining fine alignment between an incoming spread spectrum signal and a locally generated code in a digital communication receiver comprises: a delay line for storing a plurality of consecutive samples (E-1, E, M, L, L+1) of the incoming spread spectrum signal; three digitally controlled interpolators for determining by interpolation between consecutive samples an interpolated early sample, an interpolated middle sample, and an interpolated late sample; two correlators for calculating an error signal as the difference between the energy of the symbols computed from the interpolated early and late samples; a circuit for generating a control signal for controlling the interpolation phase of the digitally controlled interpolator for the early sample, and a digital non-linear filter, for smoothing the control signal of the interpolator for the early sample, enabling the update operation of the control signal only when the absolute value of the error signal at a time instant n is smaller than the absolute value of the same error signal at a time instant n−1.