US Patent 7518938 Precharge circuit of semiconductor memory apparatus

A precharge circuit for a semiconductor memory apparatus includes a preliminary precharge signal generating unit that extracts read or write command including a precharge command to enable a preliminary precharge signal, and feedbacks the enabled preliminary precharge signal, to disable the preliminary precharge signal; and a precharge signal generating unit that outputs the preliminary precharge signal as a precharge signal, after the lapse of a delayed time corresponding to the read or write command.