US Patent 7521753 Integrated circuit devices having active regions with expanded effective widths

An integrated circuit device includes a substrate having a trench formed therein. An isolation layer is disposed in the trench so as to cover a first sidewall portion of the trench and an entire bottom of the trench without covering a second sidewall portion of the trench. A buffer layer is disposed between the isolation layer and the trench. A gate insulating layer is disposed on the second sidewall portion of the trench and extends onto the substrate adjacent to the trench.