There is provided a semiconductor device 100 by which flexibility in interconnection design may be improved. The semiconductor device 100 includes: a lead frame 102 provided with an island 101 and a plurality of lead units 104; a first chip 109 which is mounted on the island 101 at the chip installed surface of the lead frame 102, and, at the same time, is provided with a first conductive pad 117 on the back of a surface opposing to the island 101; a conductive upper wire 113 connecting the first pad 117 and the lead unit 104; a conductive lower wire 115 connecting one lead unit 104 and another lead unit 104 among a plurality of the lead unit 104; and sealing resin 105 which seals the first chip 109.