Patent attributes
Provides methods, apparatus and systems for an optimizing compiler which optimizes load instructions to read out data from a memory in an object program targeted for optimization. In an example embodiment, an optimizing compiler includes partial redundancy eliminating means for performing partial redundancy elimination on load instructions to read out variable data from the memory so that spilling does not take place when the variables are assigned to the registers; backward register detecting means for detecting free registers, which are not assigned to any variable, along execution paths traced in reverse order of execution, starting backward from use instructions to use data read out by the load instructions and extending to the load instructions; and free register assigning means for assigning the free registers detected by the backward register detecting means to target variables to be read out by the load instructions.
