Patent attributes
Embodiments relate to a method for manufacturing a semiconductor device. According to embodiments, a gate insulating layer and a conductive layer may be formed on a semiconductor substrate. The conductive layer may be selectively etched to form a relatively thick portion of the conductive layer in a gate region and relatively thin portions of the conductive layer in other regions. Impurity ions may be implanted in an entire surface of the semiconductor substrate to form a lightly doped drain region. The gate insulating layer and the conductive layer may be selectively etched to form a gate electrode. Insulating layer sidewalls may be formed at both sides of the gate electrode, and source/drain regions may be formed in portions of the semiconductor substrate located at both sides of the gate electrode.
