Patent attributes
The invention relates to a monolithically integrated vertical pin photodiode which is produced according to BiCMOS technology and comprises a planar surface facing the light and a rear face and anode connections located across p areas on a top face of the photodiode. An i-zone of the pin photodiode is formed by combining a low doped first p-epitaxial layer, which has maximum thickness and doping concentration, placed upon a particularly high doped p substrate, with a low doped second n− epitaxial layer that borders the first layer, and n+ cathode of the pin photodiode being integrated into the second layer. The p areas delimit the second n epitaxial layer in a latent direction while another anode connecting area of the pin diode is provided on the rear face in addition to the anode connection.
