Patent attributes
Methods and apparatus, including computer program products, for a one or multiple-times programmable memory device. A semiconductor may include an active region of a substrate, a thin oxide layer over a substrate, a first and second polysilicon layer, and a first and second metal layer. The first polysilicon layer may have a floating gate, the active region may be substantially perpendicular to the floating gate, and the second polysilicon layer may include a control gate. The first metal layer may include a bit line connected to a first n-diffused region, where the bit line is substantially perpendicular to the floating gate. The second metal layer may include a word line and source line. The word line may be connected to the control gate, and the source line may be connected to a second n-diffused region. The thin gate oxide may have a thickness between 65 and 75 angstroms.
