US Patent 7536531 Scaling address space utilization in a multi-threaded, multi-processor computer

Scaling address space utilization in a multi-threaded, multi-processor computer, including attaching to process memory of an exporting process a region of virtual memory specified in a cross-memory descriptor; requesting, by an importing thread of an importing process having process memory, a lightweight attachment of the region of virtual memory to the process memory of the importing process for exclusive use by the importing thread; and lightweight attaching, by an operating system to the process memory of the importing process, the region of virtual memory for exclusive use by the importing thread.