US Patent 7539043 Semiconductor memory device

This disclosure concerns a memory comprising a memory cell including a floating body provided between a source and a drain and storing therein data according to number of majority carriers accumulated in the floating body; a word line connected to a gate of the memory cell; a bit line connected to the drain of the memory cell; a source line connected to the source of the memory cell; a sense amplifier sensing data from the memory cell selected by the bit line and the word line; a driver applying a voltage to the word line to form a channel in the memory cell and shifting a voltage of the source line in a voltage direction opposite to a transition direction of the voltage of the word line when first data indicating that the number of the majority carriers is small is written to the memory cell.