US Patent 7539059 Selective bit line precharging in non volatile memory
Patent 7539059 was granted and assigned to Intel on May, 2009 by the United States Patent and Trademark Office.
All edits
Edits on 17 Sep, 2023
Golden AI
Edits made to:
Infobox (+2 properties)
Infobox
Patent Inventor Names
Daniel Elmhurst0
June Lee0
Edits on 15 Sep, 2023
Golden AI
Edits made to:
Article (+268 characters)
Article
Patent abstract
A flash memory device, such as a NAND flash, is described having an array of floating gate transistor memory cells with strings of memory cells connected to respective bitlines. Structures and methods for selectively pre-charging bitlines are described.
Edits on 21 May, 2023
Golden AI
Edits made to:
Infobox (-1 properties)
Infobox
Official Website
Edits on 19 May, 2023
Golden AI
Edits made to:
Infobox (+1/-1 properties)
US Patent 07539059 Selective bit line precharging in non volatile memory US Patent 7539059 Selective bit line precharging in non volatile memory
Infobox
Patent Number
07539059
Patent Number
7539059
Edits on 15 Jun, 2022
Golden AI
Edits made to:
Infobox (+1 properties)
Infobox
Website URL
Edits on 2 Dec, 2021
Golden AI
Edits made to:
Infobox (+8 properties)
US Patent 07539059 Selective bit line precharging in non volatile memory
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07539059
Date of patent
May 26, 2009
Patent application number
11618637
Date Filed
December 29, 2006
Patent primary examiner
Find more entities like US Patent 7539059 Selective bit line precharging in non volatile memory
Use the Golden Query Tool to find similar entities by any field in the Knowledge Graph, including industry, location, and more.
