Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Jin-Man Han0
Date of Patent
June 2, 2009
0Patent Application Number
121073150
Date Filed
April 22, 2008
0Patent Primary Examiner
Patent abstract
A NAND memory architecture arranges all even bitlines of a page together, and arranges all odd bitlines of a page together, so that programming operations are carried out on adjacent bitlines on the same word line to reduce floating gate coupling. Non-connected bitlines can be used at boundaries between even and odd sections of the array to further reduce floating gate coupling.
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