US Patent 7544058 Method for high-temperature annealing a multilayer wafer

A method for annealing a multilayer wafer by subjecting the wafer to a high temperature treatment that includes at least a temperature ramp-up between a boat-in temperature and a process of at least 800° C.; at least a processing phase in the range conduct at or above the process temperature; and a temperature ramp-down from the processing phase to a boat-out temperature. The boat-in temperature is sufficiently lower than the boat-out temperature to reduce or avoid tearing-off defects on the wafer and to reduce particle contaminants on the wafer, as well as to reduce or avoid degrading wafer Dit compared to an annealing method where the boat-in and boat-out temperatures are closer in temperature.