US Patent 7551500 Memory cell fuse circuit and controlling method thereof

A controlling method of a memory cell fuse circuit is provided. The memory cell fuse circuit at least includes a reference cell fuse circuit and a plurality of normal cell fuse circuit. The reference cell fuse circuit includes a reference fuse cell and each the normal cell fuse circuit includes a normal fuse cell. The controlling method includes steps of: power on read and sensing digits of the memory cell fuse circuit; detecting if any normal fuse cell is non blank as failed; programming the reference fuse cell if at least one normal fuse cell is failed until all normal fuse cells are blank; programming and reading the normal fuse cell of each the normal cell fuse circuit; and outputting data of each the normal fuse cell.