US Patent 7553717 Recess etch for epitaxial SiGe

A PMOS transistor and a method for fabricating a PMOS transistor. The method may include providing a semiconductor wafer having a PMOS transistor gate stack, source/drain extension regions, and active regions. The method may also include forming epi sidewalls, performing a ex-situ recess etch, and performing an in-situ recess etch. The ex-situ recess etch and the in-situ recess etch form recessed active regions. The PMOS transistor is formed by a method using ex-situ and in-situ etch and has epitaxial SiGe regions with a greatest width at the surface of the semiconductor wafer.