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US Patent 7555739 Method and apparatus for maintaining synchronization between layout clones

Patent 7555739 was granted and assigned to Cadence Design Systems on June, 2009 by the United States Patent and Trademark Office.

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Patent abstract

A method and system for maintaining synchronization between a plurality of layout clones of an integrated circuit design, wherein each layout clone comprises at least one figure. The method comprises tracking relationships between equivalent figures of the plurality of layout clones, wherein the plurality of layout clones are associated with one another within an equivalence group and propagating an edit made in one of the layout clones within an equivalence group to the other layout clones within the equivalence group.

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