Patent attributes
A digital decoder is provided that produces true and complementary output signals. The digital decoder may be formed from n-channel and p-channel metal-oxide-semiconductor transistors. The digital decoder produces four true outputs and four complementary outputs from two inputs. A first of the true outputs and a first of the complementary outputs are provided using a NOR gate and an inverter. A NAND gate and an inverter are used to provide a second of the true outputs and a second of the complementary outputs. Third and fourth complementary outputs are produced using first and second logic circuits. The first and second logic circuits are powered using only a positive power supply voltage. Third and fourth true outputs are produced using third and fourth logic circuits. The third and fourth logic circuits are powered using only a ground power supply voltage. The logic circuits each include an n-channel and p-channel transistor pair.
