Patent attributes
An oscillation circuits includes an oscillation unit 30 for generating an internal clock signal having an amplitude of vibration corresponding to an internal power supply voltage thereof, switches 28, 29, a NMOS 13 of a tolerant input circuit, a first-stage driver 15, and a coupling capacitance 27. The switches 28, 29 are turned off when the external clock signal is inputted to a clock terminals 1, 2, and are turned on when the oscillation unit 30 oscillates. The NMOS 13 changes the amplitude of the input clock signal by the on-resistance and the outputs the above input clock signal from the drain electrode. The first-stage driver 15 drives the output of the drain electrode of the NMOS 13 and outputs the output thereof as a clock signal. The coupling capacitance 27 changes the gate voltage of the NMOS 13 when the input clock signal rises so as to keep the above on-resistance constant.
