Patent attributes
A thin film transistor array comprises a substrate, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of common-used distributed lines and a plurality of auxiliary electrodes, wherein the thin film transistors, the pixel electrodes and the auxiliary electrodes are respectively disposed in each exposure shot formed on the substrate. A first overlapped area exists between drains and gates so as to form parasitic capacitances between the sources and the gates. Each auxiliary electrode is disposed under the pixel electrodes and extends over the common-used distributed lines along the direction to its one side. A second overlapped area exists between the auxiliary electrodes and the common-used distributed lines so as to form storage capacitances between each auxiliary electrode and its corresponding common-used distributed line.
