Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Hiroaki Ikeda0
Date of Patent
July 7, 2009
0Patent Application Number
119078760
Date Filed
October 18, 2007
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A stacked memory is configured such that a ratio between data and ECC bits, a ratio between quantities of data layers and ECC layers, and a ratio between quantities of data activated mats and ECC activated mats are equal to each other. The memory chip has a greater quantity of mats than the quantity of stacked layers. The stacked memory is thus allowed to establish a desired ratio between the quantities of data bits and ECC bits.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.